NIC

The Nada Instructional Computer is a big endian architecture with 2-byte words, 4-bit bytes, 16 general purpose 2-byte registers, and a fixed 4-byte instruction format. Words align on 2-byte boundaries and instructions on 4-byte boundaries. Integers are in two’s complement format. The text file isa.txt defines the instruction set architecture for NIC.

A complete toolchain—including simulator, assembler, illuminating example programs, and stimulating exercises—is now available for your edification in the compressed file NIC.zip.

The image below is a running instance of the nic simulator. The preloaded program may be executed stepwise by pushing the Fetch/Execute button, or, at full speed, by pressing the Run button. The clock frequency may be set to values from 1 Hz to 1 kHz by adjusting the slider.

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The program starts at address 00. It writes the words ff, fe, …, 00 to memory at address 1c.

        00  20ff    Load r0 with the value ff
        04  21ff    Load r1 with the value ff   
        08  411c    Store r1 in mem cell 1c
        0c  81ff    Add the integer ff (-1) to r1  
        10  f109    Jump to 08 if r1 is not equal to r0
        14  0000    Halt
        18  f000    Jump to 00
        1c  00      Data used by program

The program was generated by nas, the NIC assembler, from the following source code.

        word n

        loadc   r0 -1
        loadc   r1 -1

Loop:   store   r1 n        // write r1 to memory address n
        addc    r1 -1       // r1--
        jumpn   r1 Loop     // if r1 != -1 goto Loop

Stefan Nilsson